1. Field of the Invention
The invention relates to temperature sensing in a computer system.
2. Background Art
The IBM PC AT computer architecture has become industry standard architecture for personal computers, and is typically built around a CPU such as an 80286, 80386, 80486, or 80586 (Pentium.RTM.) microprocessor manufactured by Intel Corporation. The CPU is coupled to a host (local) bus, capable of performing memory accesses and data transfers at high rates of speed (i.e., on the order of 10-66 MHz). The host bus generally includes 16, 32, or 64 data lines, a plurality of address lines, and various control lines. For present purposes the following signals on the host bus are important:
______________________________________ Signal Name Signal Description ______________________________________ HD[63:0] Host Bus Data Lines. HA[31:3] Host Bus Address Lines. BE[7:0]# Byte enables 7 through 0: Selects the active byte lanes on HD[63:0]. INTR Interrupt Request: INTR is driven to signal the processor that an interrupt request is pending and needs to be serviced. M/IO# Memory/Input-Output: M/IO#, defines processor bus cycles along with D/C#, and W/R#. D/C# Data/Control: D/C# defines processor bus cycles along with M/I0# and W/R#. W/R# Write/Read: W/R# defines processor bus cycles along with M/I0# and D/C#. ADS# Address Strobe: The processor asserts ADS# to indicate that a new bus cycie is beginning BRDY# Burst Ready: BRDY# indicates that the system has responded in one of three ways: 1) Valid data has been placed on the processor data bus in a response to a read, 2) Processor write data has been accepted by the system, or 3) the system has responded to a special cycle. STPCLK# Stop Clock: this signal is connected to the STPCLK# input of the processor. It causes the processor to get into the STPGNT# state. ______________________________________
The typical IBM PC AT-compatible computer also includes a system bus, sometimes referred to as an I/O bus. Such a system bus is used to interface communications between a host processor and a peripheral device, or communications between peripheral devices and host memory. The system bus is coupled to the host bus via certain interface circuitry. The system bus includes generally 8, 16, or 32 data lines, a plurality of address lines, as well as control lines. Commonly used system buses include the industry standard architecture (ISA) bus and the PCI bus.
Other computer system circuitry is dedicated to monitor the temperature of the system, particularly near the host processor, and to take some sort of corrective action when the system begins to overheat. To perform thermal management functions conventionally, a thermistor is positioned near the host processor. The analog signal generated from the thermistor is representative of temperature and is sent to an analog-to-digital (A/D) converter, which converts the analog temperature information into digital information, often a 12-bit value. Sometimes, the A/D converter is incorporated into a keyboard controller (KBC) because of extra inputs usually available on a KBC. The 12-bit digital value is then compared to a threshold value, and when the measured temperature reaches or surpasses the threshold, a signal is sent to the host processor indicating an overtemperature condition. The host processor then executes various routines and either slows or stops its operations. These routines often entail reprogramming various registers to slow the CPU clock rate or cutting off all power to the host processor.
Generally, there are two problems with conventional thermistor-A/D schemes. First, A/D converters tend to be expensive, driving computer system prices upward. Second, the response of the host processor to an overtemperature signal is not always reliable: despite an overtemperature signal, if the processor is not operating properly, it is never certain that appropriate action, e.g., reprogramming registers, will be undertaken to prevent the processor from irreparable damage. Therefore, more reliable, less expensive temperature sensing and notifying means is desired.